1) Modern CPUs contain a subsystem known as the Memory Management Unit (MMU).

2) This paper described the composition of manned maneuvering unit (MMU) virtual prototyping system in the virtual reality environment.

3) To test the performances of the MMU, this paper designs a test scheme by PERL language.

4) Pacifica also amends address translation with host and guest memory management unit (MMU) tables.

5) This work presents the design and implementation of Memory Management Unit(MMU) in a 32-bit RISC microprocessor.

6) In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory.

7) It also includes a memory management unit ( MMU ), a debug port, and a DMA controller.

8) MMU Memory Management Unit, translates virtual to physical addresses and provides access permission control.

9) In an MMU with two level page table, this term is used for the 32 bit entry in the second level table, or page table. Each PTE maps 4K on ARM and 4K on X86.

10) According to the characteristics of processor MMU, a simple memory protection and sharing mechanical is designed.

11) This process can occur when a memory location is requested whose page is not in memory (no mapping is present in the memory management unit [MMU]).

12) The functions of the MMU are to control the various memory systems,[http://sentencedict.com/MMU.html] translate the virtual addresses into physical addresses and control the access permission.

13) On the other hand, more than 8 MB is not necessarily better, as the operating system can waste time reloading the MMU (Memory Management Unit) tables.

14) In this paper, through a lot of experiments on the new Model MMU - 5 Tester, a set of standard conditions for the experimental study on tribology characteristics of the tester are obtained.

15) UTAR has stricter enrollment requirements. UTAR exams are more difficult as compared to other colleges (according to a friend of mine who been to UTAR and now in MMU).

16) This event is called a page fault and is detected by hardware (the MMU), and then managed by firmware after a page fault interrupt occurs.

17) The memory management is important in the OS. According to the features of the MMU of the RISC Core, a simple memory protection and share mechanism was designed in Iota.

18) This porting effort was quickly extended to cover the Atari ST series computers, although only systems with an MMU were supported.

19) uClinux is a port of the Linux kernel that can execute on systems that lack an MMU.

20) But those terminals don't satisfy power department's refined requests to load control because SCM processing rate is low and ARM7 is lack of MMU.

21) One example is the ability for Linux to run on a process with a memory management unit (MMU), as well as those that provide no MMU.